36 lines
937 B
Makefile
36 lines
937 B
Makefile
PREFIX=/usr
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#OBJS specifies which files to compile as part of the project
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OBJS = src/whatever.c
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#CC specifies which compiler to use
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CC = clang
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#COMPILER_FLAGS specifies the additional compilation options we're using
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# -w suppress all warnings
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COMPILER_FLAGS = -Wall
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#LINKER_FLAGS specifies the libraries we're linking against
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LINKER_FLAGS = -lSDL2
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#OBJ_NAME specifies the name of our executable
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OBJ_NAME= whatever
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#INCLUDES where the INCLUDE directory is
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INCLUDES = -I./include
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#This is the target that compiles our executable
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all : $(OBJS)
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$(CC) $(OBJS) $(COMPILER_FLAGS) $(INCLUDES) $(LINKER_FLAGS) -o $(OBJ_NAME)
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install :
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mkdir -p ${PREFIX}/share/${OBJ_NAME}
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cp ${OBJ_NAME} ${PREFIX}/share/${OBJ_NAME}/
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ln -si ${PREFIX}/share/${OBJ_NAME}/${OBJ_NAME} ${PREFIX}/bin/${OBJ_NAME}
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uninstall :
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rm ${PREFIX}/bin/${OBJ_NAME}
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rm ${PREFIX}/share/${OBJ_NAME}/${OBJ_NAME}
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rm -r ${PREFIX}/share/${OBJ_NAME}
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clean :
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rm ${OBJ_NAME}
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